EAN13
9782930344393
ISBN
978-2-930344-39-3
Éditeur
Presses Universitaires du Louvain
Date de publication
Collection
Thèses de l'École polytechnique de Louvain
Nombre de pages
232
Dimensions
16 x 3,4 cm
Poids
380 g
Langue
anglais
Fiches UNIMARC
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Characterization and Modeling of SOI RF integrated components

Presses Universitaires du Louvain

Thèses de l'École polytechnique de Louvain

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The boom of mobile communications leads to an increasing request of low cost
and low power mixed mode integrated circuits. Maturity of SOI technology, and
recent progresses of MOSFET's microwave performances, explain the success of
silicon as compared to III-V technologies for low-cost multigigahertz analog
applications. The design of efficient circuits requires accurate, wide-band
models for both active and passive elements. Within this frame, passive and
active components fabricated in SOI technologies have been studied. Various
topologies of integrated transmission lines, like Coplanar Waveguides or thin
film microstrip lines, have been analyzed. Also, a new physical model of
integrated inductors has been developed. This model, based on a coupled line
analysis of square spiral inductors, is scalable and independent of the
technology used. Inductors with various spacing between strips, conductor
widths, or number of turns can be simulated on different multi-layered
substrates. Each layer that composes the substrate is defined using its
electrical properties (permittivity, permeability, conductivity).
The performances of integrated sub-micron MOSFETs are analyzed. New
alternative structures of transistor (the Graded Channel MOSFET and the
Dynamic Threshold MOSFET) are proposed to increase the performances of a CMOS
technology for for analog, low power, low voltage, and microwave applications.
They are studied from Low to High frequency.
The graded channel MOSFET is an asymmetric doped channel MOSFET's which bring
solutions for the problems of premature drain break-down, hot carrier effects,
and threshold voltage (Vth) roll-off issues in deep submicrometer devices. The
GCMOS processing is fully compatible with the conventional SOI MOSFET process
flow, with no additional steps needed. The dynamic threshold voltage MOS is a
MOS transistor for which the gate and the body channel are tied together. All
DTMOS electrical properties can be deduced from standard MOS theory by
introducing Vbs = Vgs. The main advantage of DTMOS over conventional MOS is
its higher drive current at low bias conditions. To keep the body to source
current as low as possible, the body bias voltage must be kept lower than 0.7
V. It seems obvious that the DTMOS transistor is an attractive component for
low voltage applications.
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